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The cosmic cube

Published:02 January 1985Publication History
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Abstract

Sixty-four small computers are connected by a network of point-to-point communication channels in the plan of a binary 6-cube. This “Cosmic Cube” computer is a hardware simulation of a future VLSI implementation that will consist of single-chip nodes. The machine offers high degrees of concurrency in applications and suggests that future machines with thousands of nodes are both feasible and attractive.

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  1. The cosmic cube

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                        Robert Elliot Filman

                        This paper describes an experimental, highly parallel, MIMD machine architecture, the Cosmic Cube. A Cosmic Cube is composed of 2 n independent processors (nodes) connected in an n-dimensional hypercube. Bidirectional, asynchronous, point-to-point communication channels connect each node to n other nodes. The operating systems kernel running in each node schedules and runs the node's processes, and provides asynchronous interprocess message communication, including message routing. Seitz and his coworkers have built Cosmic Cubes of various sizes; the largest is a 64-element, six-dimension machine. He argues that the hypercube organization of the machine is particularly appropriate for future VLSI implementations that compress entire nodes into single chips. The difficult part of building a useful multiprocessor is not the hardware interconnection of machines but the “software" issues of problem distribution and interprocess coordination. The builders of this system recognize this fact and have devoted much of their energy to the implementation of the machine's operating system. This distributed operating system has a copy of the system kernel running on each node. Like the underlying hardware, the operating system is structured around message passing. User programs are expressed as a set of virtual processes which can be dynamically created and destroyed during program execution. As an expedient, user processes, once created, do not migrate—they are tied to a particular node. This allows the operating system to include the node number in the process identifiers, thereby simplifying the task of message routing. The operating system queues interprocess messages and preserves the order of message communications between pairs of processes. Process creation and extinction, and message transmission and reception are treated (linguistically) as requests to operating system primitives. Thus, programs for the machine are written in extended versions of ordinary sequential programming languages. Process allocation among nodes is done either by explicit programmer instruction or by the system library's allocation routine. However, the task of splitting the original computation into process-sized pieces falls on the programmer. This is because determining the potential concurrency in a conventional, sequential program is beyond the current technology. The simplest problems to code for the Cosmic Cube are therefore problems that are inherently parallel. Correspondingly, most of the examples run on the Cosmic Cube have been simulations of physical systems and scientific computations, as these domains often include naturally parallel computations. The Cosmic Cube has been implemented as a network of Intel 8086 systems, each with its own 128K byte random-access memory. The entire 64-element system fits in a single five foot long frame. Seitz states that the manufacturing cost of the system was about $80,000. As a matter of comparison, a single 8086 with a 5MHz clock runs their sample problems at about 1/6 the speed of a VAX 11/780. Typical computations using the 64-element system show a speed-up of about 50, yielding a system that runs about eight times the speed of the 11/780. Overall, this is a well-written description of significant research. Though the topics in the paper range over machine architecture, operating systems, programming languages, and performance analysis, the text is clear and understandable to the reader without specialized background in these fields. Harnessing concurrent computation is a key target for computer research over the next decade. The work described here is an important step towards realizing that goal.

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                        • Published in

                          cover image Communications of the ACM
                          Communications of the ACM  Volume 28, Issue 1
                          Special section on computer architecture
                          Jan. 1985
                          99 pages
                          ISSN:0001-0782
                          EISSN:1557-7317
                          DOI:10.1145/2465
                          Issue’s Table of Contents

                          Copyright © 1985 ACM

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                          Publication History

                          • Published: 2 January 1985

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