Partha Pratim Pande
ABSTRACT
The continuing progress and integration levels in silicon technologies make complete end-user systems on a single chip possible. This massive level of integration makes modern multi-core chips all pervasive in domains ranging from weather forecasting, astronomical data analysis, and biological applications to consumer electronics and smart phones. NoCs have emerged as communication backbones to enable a high degree of integration in multi-core SoCs. Despite their advantages, an important performance limitation in traditional NoCs arises from planar metal interconnect-based multi-hop communications, wherein the data transfer between far-apart blocks causes high latency and power consumption. The latency, power consumption, and interconnect routing problems of NoCs can be simultaneously addressed by replacing multi-hop wired paths with high-bandwidth single-hop long-range wireless links. Recent investigations have established that the silicon integrated on-chip antenna operating in the millimeter wave range of a few tens to one hundred GHz is now a viable technology. Coupled with significant advances in mm-wave transceiver design, this opens up new opportunities for detailed investigations into wireless NoCs (WiNoCs). This talk will present methodologies and challenges for designing WiNoC architectures.
- Millimeter (mm)-wave wireless NoC as interconnection backbone for multicore chips: promises and challenges
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