G. Edward Suh
George Kurian
ABSTRACT
This paper presents the author retrospective on the analytical cache modeling work published in the 2001 International Conference on Supercomputing (ICS). We summarize the history of the work, revisit primary observations and lessons that we learned from the modeling effort, and also briefly describe follow-up work to show how the research direction evolved over time.
Original Paper: http://dx.doi.org/10.1145/377792.377797
- S. Chen, P. B. Gibbons, M. Kozuch, V. Liaskovitis, A. Ailamaki, G. E. Blelloch, B. Falsafi, L. Fix, N. Hardavellas, T. C. Mowry, and C. Wilkerson. Scheduling Threads for Constructive Cache Sharing on CMPs. In Proceedings of the 19th Annual ACM Symposium on Parallel Algorithms and Architectures, 2007. Google Scholar
Digital Library
- D. Chiou, P. Jain, L. Rudolph, and S. Devadas. Application-specific Memory Management for Embedded Systems Using Software-controlled Caches. In Proceedings of the 37th Annual Design Automation Conference, 2000. Google ScholarDigital Library
- H. Cook, M. Moreto, S. Bird, K. Dao, D. A. Patterson, and K. Asanovic. A Hardware Evaluation of Cache Partitioning to Improve Utilization and Energy-efficiency While Preserving Responsiveness. In Proc. of the 40th Annual International Symposium on Computer Architecture, 2013. Google ScholarDigital Library
- R. Iyer. CQoS: A Framework for Enabling QoS in Shared Caches of CMP Platforms. In Proceedings of the 18th Annual International Conference on Supercomputing, 2004. Google ScholarDigital Library
- J. Lin, Q. Lu, X. Ding, Z. Zhang, X. Zhang, and P. Sadayappan. Gaining Insights into Multicore Cache Partitioning: Bridging the Gap between Simulation and Real Systems. In Proc. of the International Symposium on High Performance Computer Architecture, 2008.Google Scholar
- M. K. Qureshi and Y. N. Patt. Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches. In Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006. Google ScholarDigital Library
- D. Sanchez and C. Kozyrakis. Vantage: Scalable and Efficient Fine-grain Cache Partitioning. In Proc. of the 38th International Symposium on Computer Architecture, 2011. Google ScholarDigital Library
- G. E. Suh, S. Devadas, and L. Rudolph. A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning. In Proc. of the 8th International Symposium on High-Performance Computer Architecture, 2002. Google ScholarDigital Library
- G. E. Suh, L. Rudolph, and S. Devadas. Dynamic Cache Partitioning for Simultaneous Multithreading Systems. In Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, 2001.Google Scholar
- G. E. Suh, L. Rudolph, and S. Devadas. Effects of Memory Performance on Parallel Job Scheduling. In Job Scheduling Strategies for Parallel Processing, Lecture Notes in Computer Science. Springer Berlin Heidelberg, 2001. Google ScholarDigital Library
- G. E. Suh, L. Rudolph, and S. Devadas. Dynamic Partitioning of Shared Cache Memory. Journal of Supercomputing, 28(1), 2004. Google ScholarDigital Library
- D. K. Tam, R. Azimi, L. B. Soares, and M. Stumm. RapidMRC: Approximating L2 Miss Rate Curves on Commodity Systems for Online Optimizations. In Proc. of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2009. Google ScholarDigital Library
- K. Varadarajan, S. K. Nandy, V. Sharda, A. Bharadwaj, R. Iyer, S. Makineni, and D. Newell. Molecular Caches: A Caching Structure for Dynamic Creation of Application-specific Heterogeneous Cache Regions. In Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006. Google ScholarDigital Library
- R. West, P. Zaroo, C. A. Waldspurger, and X. Zhang. Online Cache Modeling for Commodity Multicore Processors. SIGOPS Oper. Syst. Rev., 44(4), 2010. Google ScholarDigital Library
- S. Zhuravlev, S. Blagodurov, and A. Fedorova. Addressing Shared Resource Contention in Multicore Processors via Scheduling. In Proc. of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2010. Google ScholarDigital Library
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- Author retrospective for analytical cache models with applications to cache partitioning
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