Ashok Kumar Palaniswamy
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Abstract
Existing threshold logic synthesis methods decompose larger input functions into smaller input functions and perform synthesis for them. It is shown that significantly larger input functions can be synthesized by implementing the existing methods in an implicant-implicit manner. Experimental results on the ISCAS 85 benchmarks show that this impacts the synthesis cost, which drops significantly. More specifically, as the size of the functions that can be handled by the synthesis algorithm increases, the number of threshold logic gates required to implement very large input functions decreases. In addition, the total weight decreases and the performance is improved.
- M. J. Avedillo and J. M. Quintana. 2004. A threshold logic synthesis tool for rtd circuits. In Proceedings of the Euromicro Symposium on Digital System Design. 624--627. Google Scholar
Digital Library
- V. Beiu, J. M. Quintana, M. J. Avedilo, and R. Andonie. 2003. Differential implementations of threshold logic gates. In Proceedings of the International Symposium on Signals, Circuits and Systems. 2, 489--492.Google Scholar
- S. Bobba and I. N. Hajj. 2000. Current mode threshold logic gates. In Proceedings of the International Conference on Computer Design. 235--240. Google ScholarDigital Library
- K. S. Brace, R. L. Rudell, and R. E. Bryant. 1990. Efficient implementation of a bdd package. In Proceedings of the 27th IEEE Design Automation Conference. 40--45. Google ScholarDigital Library
- R. E. Bryant. 1986. Graph based algorithms for boolean function manipulation. IEEE Trans. Comput. C-35, 8, 677--691. Google ScholarDigital Library
- P. Celinski, S. AlSarawi, and D. Abbott. 2000. Delay analysis of neuron MOS and capacitive threshold logic. In Proceedings of the 7th IEEE International Conference on Electronics, Circuits and Systems. 932--935.Google Scholar
- O. Coudert and J. C. Madre. 1992. A new implicit DAG based prime and essential prime computation technique. In Proceedings of the International Symposium on Information Sciences.Google Scholar
- O. Coudert, J. C. Madre, H. Fraisse, and H. Touati. 1993. Implicit prime cover computation: An overview. In Proceedings of the Synthesis And SImulation Meeting and International Interchange.Google Scholar
- C. B. Dara, T. Haniotakis, and S. Tragoudas. 2012. Delay analysis for an n-input current mode threshold logic gate. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI. 344--349. Google ScholarDigital Library
- M. L. Dertouzos. 1965. Threshold Logic: A Synthesis Approach. MIT Press, Cambridge, MA.Google Scholar
- D. Edenfeld, A. B. Kahng, M. Rodgers, and Y. Zorian. 2004. 2003 technology roadmap for semiconductors. Computer 37, 1, 47--56. Google ScholarDigital Library
- L. Franco, J. L. Subirats, M. Anthony, and J. M. Jerez. 2006. A new constructive approach for creating all linearly separable (threshold) functions. In Proceedings of the International Joint Conference on Neural Networks. 4791--4796.Google Scholar
- M. K. Goparaju, A. K. Palaniswamy, and S. Tragoudas. 2008. A fault tolerance aware synthesis methodology for threshold logic gate networks. In Proceedings of the IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems. 176--183. Google ScholarDigital Library
- M. K. Goparaju and S. Tragoudas. 2008. A novel ATPG framework to detect weight related defects in threshold logic gates. In Proceedings of the 26th IEEE VLSI Test Symposium. 323--328. Google ScholarDigital Library
- T. Gowda, S. Leshner, S. Vrudhula, and S. Kim. 2007. Threshold logic gene regulatory networks. In Proceedings of the IEEE International Workshop on Genomic Signal Processing and Statistics (GENSIPS'07). 1--4.Google Scholar
- T. Gowda and S. Vrudhula. 2008. Decomposition based approach for synthesis of multi-level threshold logic circuits. In Proceedings of the Asia and South Pacific Design Automation Conference. 125--130. Google ScholarDigital Library
- T. Gowda, S. Vrudhula, N. Kulkarni, and K. Berezowski. 2011. Identification of threshold functions and synthesis of threshold networks. IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst. 30, 5, 665--677. Google ScholarDigital Library
- G. D. Hachtel and F. Somenzi. 2006. Logic Synthesis and Verification Algorithms. Springer-Verlag. Google ScholarDigital Library
- Z. Kohavi. 1990. Switching and Finite Automata Theory. McGraw-Hill Education.Google Scholar
- C. Lageweg, S. Cotofana, and S. Vassiliadis. 2001. A linear threshold gate implementation in single electron technology. In Proceedings of the IEEE Computer Society Workshop on VLSI. 93--98. Google ScholarDigital Library
- K. Likharev. 1999. Single-electron devices and their applications. Proc. IEEE 87, 4, 606--632.Google ScholarCross Ref
- S. Minato. 1996. Binary Decision Diagrams and Applications for VLSI CAD. Springer International Series in Engineering and Computer Science, Springer. Google ScholarDigital Library
- S. Minato. 1993. Fast generation of prime irredundant covers from binary decision diagrams. IEICE Trans. Fund. Electron. Commun. Comput. Sci. 76, 967--973.Google Scholar
- S. Muroga. 1971. Threshold Logic and Its Applications. John Wiley and Sons, NY.Google Scholar
- A. L. Oliveira and A. Sangiovanni-Vincentelli. 1991. LSAT-an algorithm for the synthesis of two level threshold gate networks. In Proceedings of the IEEE International Conference on Computer Aided Design. 130--133.Google Scholar
- A. K. Palaniswamy, M. K. Goparaju, and S. Tragoudas. 2009. A fault tolerant threshold logic gate design. In Proceedings of the 13th WSEAS International Conference on Circuits. 162--167. Google ScholarDigital Library
- A. K. Palaniswamy, M. K. Goparaju, and S. Tragoudas. 2010. Scalable identification of threshold logic functions. In Proceedings of the 20th Great Lakes Symposium on VLSI. 269--274. Google ScholarDigital Library
- A. K. Palaniswamy and S. Tragoudas. 2012a. An efficient heuristic to identify threshold logic functions. ACM J. Emerg. Technol. Comput. Syst. 8, 3, 19:1--19:17. Google ScholarDigital Library
- A. K. Palaniswamy and S. Tragoudas. 2012b. A scalable threshold logic synthesis method using ZBDDs. In Proceedings of the 22th Great Lakes Symposium on VLSI. 307--310. Google ScholarDigital Library
- W. Prost, U. Auer, F. Tegude, C. Pacha, K. Goser, R. Duschl, K. Eberl, and O. Schmidt. 2001. Tunnelling diode technology. In Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic. 49--58. Google ScholarDigital Library
- J. M. Quintana and M. J. Avedillo. 2008. Analysis of the critical rise time in mobile-based circuits. In Proceedings of the IEEE International Conference on Electronics, Circuits and Systems (ICECS'08). 938--941.Google Scholar
- F. Somenzi. 2012. Cudd: Cu decision diagram package, v 2.4.2. http://vlsi.colorado.edu/∼fabio/CUDD.Google Scholar
- J. L. Subirats, J. M. Jerez, and L. Franco. 2008. A new decomposition algorithm for threshold synthesis and generalization of boolean functions. IEEE Trans. Circuits Syst. I 55, 10, 3188--3196.Google Scholar
- R. O. Winder. 1962. Threshold logic. Ph.D. Dissertation, Princeton University, Princeton, NJ.Google Scholar
- R. Zhang, P. Gupta, L. Zhong, and N. K. Jha. 2005. Threshold network synthesis and optimization and its application to nanotechnologies. IEEE Trans. Comput.-Aid. Des. Integr. Circuits Syst. 24, 1, 107--118. Google ScholarDigital Library
Index Terms
- Improved Threshold Logic Synthesis Using Implicant-Implicit Algorithms
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