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Hybridization of NSGA-II with greedy re-assignment for variation tolerant logic mapping on nano-scale crossbar architectures

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Published:12 July 2014Publication History

ABSTRACT

There exit high variations among nano-devices in nano-electronic systems, owing to the extremely small size and the bottom-up self-assembly nanofabrication process. Therefore, it is important to develop logical function mapping techniques with the consideration of variation tolerance. In this paper, the variation tolerant logical mapping (VTLM) problem is treated as a multi-objective optimization problem (MOP), a hybridization of Non-dominated Sorting Genetic Algorithm II (NSGA-II) with a problem-specific local search is presented to solve the problem. The experiment results show that with the assistance of the problem-specific local search, the presented algorithm is effective, and can find better solutions than that without the local search.

References

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  1. Hybridization of NSGA-II with greedy re-assignment for variation tolerant logic mapping on nano-scale crossbar architectures

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    • Published in

      cover image ACM Conferences
      GECCO Comp '14: Proceedings of the Companion Publication of the 2014 Annual Conference on Genetic and Evolutionary Computation
      July 2014
      1524 pages
      ISBN:9781450328814
      DOI:10.1145/2598394

      Copyright © 2014 Owner/Author

      Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 12 July 2014

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