- 1.R. Ashenhurst. ~'The Decomposition of Switching Functions." In Proc. an International Symposium on the Theory of Swilchinq. pp. 74-116. Apr. 1957.Google Scholar
- 2.R. Brayton. G. I-l'achtel, C. McgIullen, and A. S.- Vincentelli. ":Logic Minimization Algorithms for VLSI Synthesis.'" Kluwer Academic Publishers. 1984. Google ScholarDigital Library
- 3.R'. Bravton, R. Rudell, A. S.-Vincentelli. and A. Wang, "MIS: "3, klultiple-Level Logic Optimization System," IEEE Trans. on CAD. (;(6), pp. 1062-1081, Nov. 1987.Google Scholar
- 4.R.Bryant. "Graph-Based Algorithms for Boolean Function Manipulation." IEEE Trans. Comput., C-35(8), pp. 6~;7-691. Aug. 198(; Google ScholarDigital Library
- 5.~.Bertacco. and M.Damiani. "The disjunctive Decomposition of Logic Functions," In Proc ICCAD'97, pp.78- 82. Nov. 1997. Google ScholarDigital Library
- 6.Y. Lai. M. Pedram, and S. Vrudhula, "BDD Based Decomposition of Logic Functions with Application to FPGA Synthesis." In Proc. DAC'93, pp. 642-647, June 19!)3. Google ScholarDigital Library
- 7.S. Minato, "Fast Generation of Irredundant Sum-of- Products Forms from Binary Decision Diagrams," In Proc. Synthesis and simulation Meeting and International Interchange (SASI;}H'92), pp. 64-73, Apr. 1992.Google Scholar
- 8.S. Minato, "Fast Factorization Method for Implicit Cube Set Representation", IEEE Trans. on CAD, 15(4), pp.377-384. A~. 199.6. Google ScholarDigital Library
- 9.E. Morreale, "'Kecurslve Operators for Prime Implicant and Irredundant Normal Form Determination," IEEE Trans. Compul. C-19(6), pp. 504-509, June 1970.Google ScholarDigital Library
- 10.3. Roth and R. Karp, "Minimization Over Boolean Graphs," IBM Journal pj~. 22%2.38. Anr. 1962.Google Scholar
- 11.T. S*asao, :FPGA Design 5y Generalized Functional Decomposition," In T. Sasao, editor, Logic Synthesis and Optimization, pp. 233-258, Kluwer Academic Publishers, 1993.Google Scholar
- 12.FI. Sawada, S. Yamashita, and A. Nagoya, "Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables," In Proc. Seventh Great La~'es Symposium on VLSI (GLSVLSI'97), pp. 39-44, Mar. 1997. Google ScholarDigital Library
Index Terms
- Finding all simple disjunctive decompositions using irredundant sum-of-products forms
Recommendations
Restructuring logic representations with easily detectable simple disjunctive decompositions
DATE '98: Proceedings of the conference on Design, automation and test in EuropeSimple disjunctive decomposition is a special case of logic function decompositions, where variables are divided into two disjoint sets and there is only one newly introduced variable. This paper presents that many simple disjunctive decompositions can ...
Asynchronous sum-of-products logic minimization and orthogonalization
We propose a method of the asynchronous sum-of-products SOP logic simplification that comprises of minimization and orthogonalization. The method is based on a transformation of the conventional single-rail SOP synchronous logic into the dual-rail ...
Synthesis of reversible PLA using products sharing
Reversible logic is a computing design, where the ideal implementation would produce zero entropy gain. This unique feature causes prominent use of reversible computing. At the same time, more integration capability and regular structure for ...
Comments