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How Emerging Memory Technologies Will Have You Rethinking Algorithm Design

Published:25 July 2016Publication History

ABSTRACT

We are on the cusp of the emergence of a new wave of nonvolatile memory technologies that are projected to become the dominant type of main memory in the near future. A key property of these new memory technologies is their asymmetric read-write costs: Writes can be an order of magnitude or more higher energy, higher latency, and lower (per-module) bandwidth than reads. This high cost for writes motivates a rethinking of algorithm design towards "write-efficient" algorithms and data structures that reduce their number of writes. Many popular techniques for sequential, distributed, and parallel algorithms are tuned to the setting where reads and writes cost the same, and hence need to be revisited. Prior work on reducing writes to contended cache lines in shared memory algorithms can be useful here, but with the new technologies, even writes to uncontended memory is costly. Moreover, the new technologies are unlikely to replace the fastest cache memory, motivating the study of a multi-level memory hierarchy comprised of smaller symmetric level(s) and a larger asymmetric level. Lower bounds, too, need to be revisited in light of asymmetric costs. This talk provides background on these emerging memory technologies, highlights the progress to date on these exciting research questions, and touches on a few of the many open problems.

References

  1. N. Ben-David, G. E. Blelloch, J. T. Fineman, P. B. Gibbons, Y. Gu, C. McGuffey, and J. Shun. Parallel algorithms for asymmetric read-write costs. In ACM SPAA, 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. G. E. Blelloch, J. T. Fineman, P. B. Gibbons, Y. Gu, and J. Shun. Efficient algorithms under asymmetric read and write costs. arXiv:1511.01038, 2015.Google ScholarGoogle Scholar
  3. G. E. Blelloch, J. T. Fineman, P. B. Gibbons, Y. Gu, and J. Shun. Sorting with asymmetric read and write costs. In ACM SPAA, 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. E. Carson, J. Demmel, L. Grigori, N. Knight, P. Koanantakool, O. Schwartz, and H. V. Simahdri. Write-avoiding algorithms. In IEEE IPDPS, 2016.Google ScholarGoogle ScholarCross RefCross Ref
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  6. S. D. Viglas. Write-limited sorts and joins for persistent memory. Proc. VLDB Endowment, 7(5), 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library

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          cover image ACM Conferences
          PODC '16: Proceedings of the 2016 ACM Symposium on Principles of Distributed Computing
          July 2016
          508 pages
          ISBN:9781450339643
          DOI:10.1145/2933057

          Copyright © 2016 Owner/Author

          Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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          Association for Computing Machinery

          New York, NY, United States

          Publication History

          • Published: 25 July 2016

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          PODC '16 Paper Acceptance Rate40of149submissions,27%Overall Acceptance Rate740of2,477submissions,30%

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