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I/O scheduling with mapping cache awareness for flash based storage systems

Published:01 October 2016Publication History

ABSTRACT

NAND flash memory has been the default storage component in mobile systems. One of the key technologies for flash management is the address mapping scheme between logical addresses and physical addresses, which deals with the inability of in-place-updating in flash memory. Demand-based page-level mapping cache is often applied to match the cache size constraint and performance requirement of mobile storage systems. However, recent studies showed that the management overhead of mapping cache schemes is sensitive to the host I/O patterns, especially when the mapping cache is small. This paper presents a novel I/O scheduling scheme, called MAP, to alleviate this problem. The proposed scheduling approach reorders I/O requests for performance improvement from two angles: Prioritizing the requests that will hit in the mapping cache, and grouping requests with related logical addresses into large batches. Experimental results show that MAP improved upon traditional I/O schedulers by 30% and 8% in terms of read and write latencies, respectively.

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  • Published in

    cover image ACM Other conferences
    EMSOFT '16: Proceedings of the 13th International Conference on Embedded Software
    October 2016
    260 pages
    ISBN:9781450344852
    DOI:10.1145/2968478

    Copyright © 2016 ACM

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    New York, NY, United States

    Publication History

    • Published: 1 October 2016

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