skip to main content
10.1145/3061639.3062236acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
research-article

Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAM

Authors Info & Claims
Published:18 June 2017Publication History

ABSTRACT

Non-volatile random-access memory (NVRAM) becomes a mainstream storage device in embedded systems due to its favorable features, such as small size, low power consumption, and short read/write latency. On NVRAM, a write operation consumes more energy and time than a read operation. However, current mobile/embedded file systems (e.g., EXT2/3 and EXT4) are very unfriendly for NVRAM devices. The reason is that a journaling mechanism writes the same data twice during data commitment and checkpoint. Such observations motivate this paper to design a two-phase write reduction journaling file system called wrJFS. In the first phase, wrJFS classified data into two categories: Metadata and user data. Metadata will be handled by partial byte-enabled journaling strategy, and user data will be processed in the second phase. In the second phase, user data will be compressed by hardware encoder so as to reduce the write size, and managed compressed-enabled journaling strategy to avoid the write amplification. The experimental results show that the proposed wrJFS can reduce the size of the write request by 89.7% on average, compared with the original EXT3.

References

  1. R. H. Arpaci-Dusseau and A. C. Arpaci-Dusseau. Operating Systems: Three Easy Pieces, chapter Crash Consistency: FSCK and Journaling. Arpaci-Dusseau Books, 0.91 edition, May 2015.Google ScholarGoogle Scholar
  2. M. T. Chang, P. Rosenfeld, S. L. Lu, and B. Jacob. Technology comparison for large last-level caches (l3cs): Low-leakage sram, low write-energy stt-ram, and refresh-optimized edram. In High Performance Computer Architecture (HPCA2013), 2013 IEEE 19th International Symposium on, pages 143--154, Feb 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. C. Chen, J. Yang, Q. Wei, C. Wang, and M. Xue. Fine-grained metadata journaling on nvm. In 2016 IEEE 32th Symposium on Mass Storage Systems and Technologies (MSST), May 2016.Google ScholarGoogle ScholarCross RefCross Ref
  4. R. Chen, Z. Qin, Y. Wang, D. Liu, Z. Shao, and Y. Guan. On-demand block-level address mapping in large-scale nand flash storage systems. IEEE Transactions on Computers, 64(6):1729--1741, June 2015.Google ScholarGoogle Scholar
  5. H.J. Choi, S.-H. Lim, and K. H. Park. Jftl: A flash translation layer based on a journal remapping for flash memory. Trans. Storage, 4(4):14:1--14:22, Feb. 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. I. Corporation. Intel and micron produce breakthrough memory technology, 2015.Google ScholarGoogle Scholar
  7. S. Eilert, M. Leinwander, and G. Crisenza. Phase change memory: A new memory enables new memory usage models. In Proc. IEEE 2009 International Memory Workshop, pages 1--2, May 2009.Google ScholarGoogle ScholarCross RefCross Ref
  8. IOzone Organization. IOzone Filesystem Benchmark. http://www.iozone.org/.Google ScholarGoogle Scholar
  9. J. Katcher. Postmark: a new file system benchmark. Network Appliance Tech Report TR3022, Oct. 1997.Google ScholarGoogle Scholar
  10. O. Kwon, Y. Yoo, and K. Koh. Swapping strategy to improve i/o performance of mobile embedded systems using compressed file systems. In Embedded and Real-Time Computing Systems and Applications, 2008. RTCSA '08. 14th IEEE International Conference on, pages 169--176, Aug 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. Architecting phase change memory as a scalable dram alternative. pages 2--13, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. E. Lee, H. Bahn, and S. H. Noh. Unioning of the buffer cache and journaling layers with non-volatile memory. In Presented as part of the 11th USENIX Conference on File and Storage Technologies (FAST 13), pages 73--80, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. E. Lee, S. H. Yoo, and H. Bahn. Design and implementation of a journaling file system for phase-change memory. IEEE Transactions on Computers, 64(5):1349--1360, May 2015.Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. Y. Li, H. Xu, R. Melhem, and A. K.Jones. Space oblivious compression: Power reduction for non-volatile main memories. In Proceedings of the 25th Edition on Great Lakes Symposium on VLSI, pages 217--220. ACM, May 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. G. Narváez. Taking advantage of Ext3 journaling file system in a forensic investigation. Technical report, SANS Institute InfoSec Reading Room, Dec. 2007.Google ScholarGoogle Scholar
  16. P. M. Palangappa and K. Mohanram. Flip-mirror-rotate: An architecture for bit-write reduction and wear leveling in non-volatile memories. In Proceedings of the 25th Edition on Great Lakes Symposium on VLSI, GLSVLSI '15, pages 221--224, New York, NY, USA, 2015. ACM. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. Y. Park and J. S. Kim. zftl: power-efficient data compression support for nand flash-based consumer electronics devices. IEEE Transactions on Consumer Electronics, 57(3):1148--1156, August 2011.Google ScholarGoogle ScholarCross RefCross Ref
  18. V. Prabhakaran, A. C. Arpaci-Dusseau, and R. H. Arpaci-Dusseau. Analysis and evolution of journaling file systems. In Proc. USENIX 2005 Annual Technical Conference, pages 1--16, Apr. 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. S. M. Seyedzadeh, R. Maddah, A. Jones, and R. Melhem. Pres: Pseudo-random encoding scheme to increase the bit flip reduction in the memory. In Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE, pages 1--6, June 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. D.J. Shoff, J. Liu, and J. C. Southmayd. Compressed file system for non-volatile ram, Sept. 13 2005. US Patent 6,944,742.Google ScholarGoogle Scholar
  21. M. Son, S. Lee, K. Kim, S. Yoo, and S. Lee. A small non-volatile write buffer to reduce storage writes in smartphones. In Design, Automation Test in Europe Conference Exhibition (DATE), 2015, pages 713--718, March 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. C. Sun, A. Arakawa, and K. Takeuchi. Sea-ssd: A storage engine assisted ssd with application-coupled simulation platform. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(1):120--129, Jan 2015.Google ScholarGoogle ScholarCross RefCross Ref
  23. J. Yue and Y. Zhu. Accelerating write by exploiting pcm asymmetries. In High Performance Computer Architecture (HPCA2013), 2013 IEEE 19th International Symposium on, pages 282--293, Feb 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. Z. Zhang, L. Ju, and Z. Jia. Unified dram and nvm hybrid buffer cache architecture for reducing journaling overhead. In 2016 Design, Automation Test in Europe Conference Exhibition (DATE), pages 942--947, March 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. M. Zhao, Y. Xue, C. Yang, and C. J. Xue. Minimizing mlc pcm write energy for free through profiling-based state remapping. In Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific, pages 502--507, Jan 2015.Google ScholarGoogle ScholarCross RefCross Ref
  1. Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAM

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in
    • Published in

      cover image ACM Conferences
      DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017
      June 2017
      533 pages
      ISBN:9781450349277
      DOI:10.1145/3061639

      Copyright © 2017 ACM

      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 18 June 2017

      Permissions

      Request permissions about this article.

      Request Permissions

      Check for updates

      Qualifiers

      • research-article
      • Research
      • Refereed limited

      Acceptance Rates

      Overall Acceptance Rate1,770of5,499submissions,32%

      Upcoming Conference

      DAC '24
      61st ACM/IEEE Design Automation Conference
      June 23 - 27, 2024
      San Francisco , CA , USA

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader