Anteneh Gebregiorgis
ABSTRACT
Near threshold computing (NTC) through aggressive supply voltage scaling has the potential to significantly improve energy-efficiency. However, the increase in variation-induced timing errors is a major challenge in NTC. This can be addressed in the scope of approximate computing by selectively embracing non-important variation-induced timing errors. In this paper, we propose a framework to leverage the error tolerance potential of approximate computing for energy-efficient NTC designs. In our framework, statistical timing error analysis as well as structural and functional error propagation analysis is performed to identify the approximable portion of a design. Then, a mixed-timing logic synthesis is employed to improve energy-efficiency by embracing errors in the approximable portion of the design. Experimental results show that the proposed approach can improve the energy-efficiency of NTC designs by more than 30%.
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