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Exploiting cache locality to speedup register clustering

Published: 28 August 2017 Publication History

Abstract

Physical design tools must handle huge amounts of data in order to solve problems for circuits with millions of cells. Traditionally, Electronic Design Automation tools are implemented using Object-Oriented Design. However, using this paradigm may lead to overly complex objects that result in waste of cache memory space. This memory wasting harms cache locality exploration and, consequently, degrades software runtime. This work proposes applying Data-Oriented Design on the register clustering problem. Differently from the traditional Object-Oriented design, the Data-Oriented Design programming model focus on how the data is organized in the memory. As consequence, this programming model may better explore cache spatial locality. In order to evaluate the impact of using the Data-Oriented Design programming model for register clustering, we implemented two software prototypes (a sequential and a parallel implementation) of the K-means clustering algorithm for each programming model. Experimental results showed that the sequential Data-Oriented Design implementation is on average 7.5% faster when compared to the Object-Oriented Design implementation, while its parallel version is 15% faster when compared to the Object-Oriented one.

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Cited By

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  • (2022)Evaluating the performance of object-oriented and data-oriented design with multi-threading in game development2022 IEEE Games, Entertainment, Media Conference (GEM)10.1109/GEM56474.2022.10017610(1-6)Online publication date: 27-Nov-2022

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cover image ACM Conferences
SBCCI '17: Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands
August 2017
238 pages
ISBN:9781450351065
DOI:10.1145/3109984
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 28 August 2017

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Author Tags

  1. cache locality
  2. data-oriented design
  3. electronic design automation
  4. physical design
  5. register clustering

Qualifiers

  • Research-article

Funding Sources

  • Project Universal
  • PQ
  • Brazilian Council for Scientic and Technological Development (CNPq)
  • Brazilian Federal Agency for the Support and Evaluation of Graduate Education (CAPES)
  • M.Sc.

Conference

SBCCI '17
Sponsor:
SBCCI '17: 30th Symposium on Integrated Circuits and Systems Design
August 28 - September 1, 2017
Ceará, Fortaleza, Brazil

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Overall Acceptance Rate 133 of 347 submissions, 38%

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View all
  • (2022)Evaluating the performance of object-oriented and data-oriented design with multi-threading in game development2022 IEEE Games, Entertainment, Media Conference (GEM)10.1109/GEM56474.2022.10017610(1-6)Online publication date: 27-Nov-2022

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