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Vanguard: a chip physical design system

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Published:02 July 1986Publication History

ABSTRACT

Vanguard is a new physical design system which combines advantages of gate array and custom design methods to produce high-density chips on non-custom regular images. Vanguard physically partitions a chip into subchips which define macro boundaries and which contain not only macro circuitry and internal macro wires but also inter-macro connections and portions of connections which are part of the final chip design and lie within that region. Subchips are individually designed and then connected by abutment to assemble the chip. Vanguard has been used to design a 32-bit DCVS microprocessor comprising 13 macros, including a large register array.

References

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        • Published in

          cover image ACM Conferences
          DAC '86: Proceedings of the 23rd ACM/IEEE Design Automation Conference
          July 1986
          835 pages
          ISBN:0818607025
          • Chairman:
          • Don Thomas

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          IEEE Press

          Publication History

          • Published: 2 July 1986

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          DAC '86 Paper Acceptance Rate124of300submissions,41%Overall Acceptance Rate1,770of5,499submissions,32%

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