An experimental representation for organizational level designs and synthesis

ABSTRACT

A representation for Computer Organization is presented. The objectives of this work were to have a representation that permits expression of Organizational Level designs, can be used for synthesis of logic networks, and serves as a communication medium between system and logic designers. Features of the language for design capture and synthesis are identified and discussed. Finally an experimental language based on an existing Hardware Description Language, used to test the concepts in the design of the representation is discussed.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN

General Terms:
Design, Experimentation, Theory