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Automatic compiler techniques for thread coarsening for multithreaded architectures
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Source International Conference on Supercomputing archive
Proceedings of the 14th international conference on Supercomputing table of contents
Santa Fe, New Mexico, United States
Pages: 306 - 315  
Year of Publication: 2000
ISBN:1-58113-270-0
Authors
Gary M. Zoppetti  Department of Computer and Information Sciences, University of Delaware, Newark DE
Gagan Agrawal  Department of Computer and Information Sciences, University of Delaware, Newark DE
Lori Pollock  Department of Computer and Information Sciences, University of Delaware, Newark DE
Jose Nelson Amaral  Department of Electrical and Computer Engineering, University of Delaware, Newark DE
Xinan Tang  Chameleon Systems Inc., Sunnyvale, CA and Department of Electrical and Computer Engineering, University of Delaware, Newark DE
Guang Gao  Department of Electrical and Computer Engineering, University of Delaware, Newark DE
Sponsor
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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ABSTRACT

Multithreaded architectures are emerging as an important class of parallel machines. By allowing fast context switching between threads on the same processor, these systems hide communication and synchronization latencies and allow scalable parallelism for dynamic and irregular applications. Thread partitioning is the most important task in compiling high-level languages for multithreaded architectures. Non-preemptive multithreaded architectures, which can be built from off-the-shelf components, require that if a thread issues a potentially remote memory request, then any statement that is dependent upon this request must be in a separate thread.When performing thread partitioning on codes that use pointer-based recursive data structures, it is often difficult to extract accurate dependence information. As a result, threads of unnecessarily small granularity get generated, which, because of thread switching costs, leads to increased execution time. In this paper, we present three techniques that lead to improved extraction and representation of dependence information in the presence of structured control flow, references through fields of structures, and pointer-based data structures. The benefit of these techniques is the generation of coarser-grained threads and, therefore, decreased execution time. Our experiments were performed using the EARTH-C compiler and the EARTH multithreaded architecture model emulated on both a cluster of Pentium PCs and a distributed memory multiprocessor. On our set of 6 pointer-based programs, these techniques reduced the static number of threads by 38%. Reductions in execution times ranged from 16% to 45% on the four programs we measured runtime performance.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Klaus Eric Schauser, David E. Culler, and Thorsten yon Eiken. Compiler-controlled multithreading for lenient parallel languages. No. UCB/CSD 91/640, ACM Computing Surveys, at Berkeley, 1991.
 
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Collaborative Colleagues:
Gary M. Zoppetti: colleagues
Gagan Agrawal: colleagues
Lori Pollock: colleagues
Jose Nelson Amaral: colleagues
Xinan Tang: colleagues
Guang Gao: colleagues

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