|
ABSTRACT
The computer industry is currently examining the use of strong synchronization operations such as double compare-and-swap (DCAS) as a means of supporting non-blocking synchronization on tomorrow's multiprocessor machines. However, before such a strong primitive will be incorporated into hardware design, its utility needs to be proven by developing a body of effective non-blocking data structures using DCAS.
As part of this effort, we present two new linearizable non-blocking implementations of concurrent deques using the DCAS operation. The first uses an array representation, and improves on former algorithms by allowing uninterrupted concurrent access to both ends of the deque while correctly handling the difficult boundary cases when the deque is empty or full. The second uses a linked-list representation, and is the first non-blocking unbounded-memory deque implementation. It too allows uninterrupted concurrent access to both ends of the deque.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
 |
1
|
Yehuda Afek , Michael Merritt , Gadi Taubenfeld , Dan Touitou, Disentangling multi-object operations (extended abstract), Proceedings of the sixteenth annual ACM symposium on Principles of distributed computing, p.111-120, August 21-24, 1997, Santa Barbara, California, United States
[doi> 10.1145/259380.259431]
|
| |
2
|
AGESEN, O., AND CARTWRIGHT JR., R. S. Platform independent double compare and swap operation, Dec. 1998. U.S. Patent Application Express Mail Number EL092132504US Ref P3368.
|
 |
3
|
|
 |
4
|
|
 |
5
|
|
| |
6
|
|
 |
7
|
|
| |
8
|
BERSHAD, B. N. Practical considerations for nonblocking concurrent objects. In Proceedings 13th IEEE International Conference on Distributed Computing Systems (May 25-28 1993), IEEE Computer Society Press, pp. 264-273. Los Alamitos CA.
|
| |
9
|
|
| |
10
|
|
| |
11
|
|
 |
12
|
|
| |
13
|
|
 |
14
|
|
 |
15
|
|
| |
16
|
HERLIHY, M. P., AND Moss, J. Transactional memory: Architectural support for lock-free data structures. Tech. Rep. CRL 92//07, Digital Equipment Corporation, Cambridge Research Lab, 1992.
|
 |
17
|
|
| |
18
|
|
| |
19
|
MASSALIN, H., AND PU, C. A lock-free multiprocessor OS kernel. Tech. Rep. TR CUCS-005-9, Columbia University, New York, NY, 1991.
|
| |
20
|
|
| |
21
|
|
| |
22
|
MOTOROLA. MC68030 User's Manual. Prentice-Hall, 1989.
|
 |
23
|
|
| |
24
|
SHAVIT, N., AND TOUITOU, D. Software transactional memory. Distributed Computing 10, 2 (February 1997), 99-116.
|
| |
25
|
STEELE JR., G. L. Common Lisp. Digital Press, Digital Equipment Corporation, 1990.
|
Peer to Peer - Readers of this Article have also read:
-
Data structures for quadtree approximation and compression
Communications of the ACM
28, 9
Hanan Samet
-
A hierarchical single-key-lock access control using the Chinese remainder theorem
Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing
Kim S. Lee
, Huizhu Lu
, D. D. Fisher
-
The GemStone object database management system
Communications of the ACM
34, 10
Paul Butterworth
, Allen Otis
, Jacob Stein
-
Putting innovation to work: adoption strategies for multimedia communication systems
Communications of the ACM
34, 12
Ellen Francik
, Susan Ehrlich Rudman
, Donna Cooper
, Stephen Levine
-
An intelligent component database for behavioral synthesis
Proceedings of the 27th ACM/IEEE conference on Design automation
Gwo-Dong Chen
, Daniel D. Gajski
|