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A no-busy-wait balanced tree parallel algorithmic paradigm
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Source ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures table of contents
Bar Harbor, Maine, United States
Pages: 147 - 155  
Year of Publication: 2000
ISBN:1-58113-185-2
Author
Uzi Vishkin  University of Maryland
Sponsors
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 6,   Downloads (12 Months): 26,   Citation Count: 2
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ABSTRACT

Suppose that a parallel algorithm can include any number of parallel threads. Each thread can proceed without ever having to busy wait to another thread. A thread can proceed till its termination, but no new threads can be formed. What kind of problems can such restrictive algorithms solve and still be competitive in the total number of operations they perform with the fastest serial algorithm for the same problem? Intrigued by this informal question, we considered one of the most elementary parallel algorithmic paradigms, that of balanced binary trees. The main contribution of this paper is a new balanced (not necessarily binary) tree no-busy-wait paradigm for parallel algorithms; applications of the basic paradigm to two problems are presented: building heaps, and executing parallel tree contraction (assuming a preparatory stage); the latter is known to be applicable to evaluating a family of general arithmetic expressions. For putting things in context, we also discuss our “PRAM-on-chip” vision (actually a small update to it), presented at SPAA98.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
AG94
 
ADKP89
 
BSV93
 
CV88a
R. Cole and U. Vishkin. The accelerated centroid decomposition technique for optimal parallel tree evaluation in logarithmic time. Algorithmica, 3:329-348, 1988.
 
CLR90
 
CS99
 
DL99
 
DS99
 
Gi93
P.B. Gibbons. Asynchronous P RAM algorithms. In Synthesis of Parallel Algorithms, J.H. Reif (editor), Morgan- Kaufmann, 1993, 957-997.
 
HP96
 
KD88
 
MR89
G.L. Miller and J.I-I. Reif. Parallel tree contraction part 1: fundamentals. Advances in Computing Research, Vol 5, 47- 72, 1989.
 
MR91
 
RMM
M. Reid-Miller, G.L. Miller and F. Modugno. List ranking and parallel tree contraction, J.H. Reif (editor), Morgan- Kaufmann, 1993, 115-194.
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