Design of a low-power CMOS baseband circuit for wideband CDMA testbed (poster session)

ABSTRACT

In this paper, the design and performance of a CMOS baseband circuit for WCDMA direct conversion receiver are presented. Consisting of one 5th-order anti-aliasing filter, one 4th-order tunable channel filter, and three variable gain amplifier (VGA) stages, the baseband chain provides 72dB gain range with 2dB gain step and is tunable to select three different bandwidths (from 5MHz to 20MHz radio-frequency spacing). It dissipates only 18mW from a single 3V supply. The input IP3 is 10dBm, and the input-referred noise in the passband is 41nV/$\sqrt{Hz}$.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN

General Terms:
Design, Experimentation, Performance

Keywords:
VGA, baseband, filter, wideband CDMA