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ABSTRACT
It is difficult to exploit the massive, fine-grained parallelism of configurable hardware with a conventional application programðming language such as C, Pascal or Java. The difficulty arises from the mismatch between the synchronous, concurrent processing capability of the hardware and the expressiveness of the lanðguage-the so-called "semantic gap." We attack this problem by using a programming model matched to the hardware's capabilities that can be implemented in any (unmodified) object-oriented lanðguage, and building a corresponding compiler. The result is appliðcation code that can be developed, compiled, debugged and executed on a personal computer using conventional tools (such as Visual C++ or Visual Cafe), and then recompiled without modifiðcation to the configurable hardware target. A straightforward C++ implementation of the Serpent encryption algorithm compiled with our compiler onto a Virtex XCV1000 FPGA yielded an implemenðtation that was smaller (3200 vs. 4502 CLBs) and faster (77 MHz vs. 38 MHz) than an independent VHDL implementation with the same degree of pipelining. A tuned version of the source yielded an implementation that ran at 95 MHz.
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CITED BY 3
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Barry Shackleford , Greg Snider , Richard J. Carter , Etsuko Okushi , Mitsuhiro Yasuda , Katsuhiko Seo , Hiroto Yasuura, A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine, Genetic Programming and Evolvable Machines, v.2 n.1, p.33-60, March 2001
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