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Reliable estimation of execution time of embedded software
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents
Munich, Germany
Pages: 580 - 589  
Year of Publication: 2001
ISBN:0-7695-0993-2
Authors
P. Giusto  Cadence Design Systems, Inc., 2670 Seely Avenue, San Jose', CA
G. Martin  Cadence Design Systems, Inc., 2670 Seely Avenue, San Jose', CA
E. Harcourt  Cadence Design Systems, Inc., 270 Billerica Rd, Chelmsford, MA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ECSI :
IEEE-CS\DATC : IEEE Computer Society
RAS : RAS
EDAC : Electronic Design Automation Consortium
IEEE-CS\TTTC : Test Technology Technical Council
IFIP WG 10.5 : IFIP WG 10.5
EDAA : European Design Automation Association
Publisher
IEEE Press  Piscataway, NJ, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 34,   Citation Count: 11
Additional Information:

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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W. Baker, M. Hartoog, and G. Martin. Scalable techniques for the performance estimation of codesigned hardware/software systems. Proceedings of the Cadence Technical Conference, May 1997.
 
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S. Chakravarty, S. Krolikoski, and G. Martin. Dsp software estimation using characterised kernel functions. Proceedings of DSP Deutschland '99, Sept. 1999.
 
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G. Martin and B. Salefski. Methodology and technology for design of communications and multimedia products via system-level ip integration. Proceedings of Design Automation and Test Conference - Designer Track, 1998.
 
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T. Smith and D. Setliff. Towards an automatic synthesis system for real-time software. Proceedings of Real-Time Systems Symposium, 1991.
 
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F. Stappert. Predicting pipelining and caching behaviour of hard real-time programs. Technical report, Motorola, C- LAB internal document, Furstenalle 11, D-333102 Paderborn, Germany.
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W. Wolf and J. Martinez. C program performance estimation for embedded systems architecture sizing. Proceedings of the Workshop on Hardware/Software Codesign, September 1994.
 
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W. Ye, R. Ernst, T. Benner, and J. Henkel. Fast timing analysis for hardware/ software c-synthesis. Proceedings of the ICCD93, October 1993.

CITED BY  11
 
 
 
 
 
 
 

Collaborative Colleagues:
P. Giusto: colleagues
G. Martin: colleagues
E. Harcourt: colleagues

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