|
ABSTRACT
Dynamic voltage scaling (DVS) is a powerful technique to reduce power dissipation in embedded systems. Some efficient DVS algorithms have been recently proposed for the energy reduction in distributed system. However, they achieve the energy savings solely by scaling the system task with respect to the timing constraints, while neglecting that power varies among, the tasks executed by DVS processing elements (DVS-PEs). In this paper we investigate the problem of considering DVS-PE power variations dependent on the executed tasks, during the synthesis of distributed embedded systems and its impact on the energy savings. Unlike previous approaches, which minimise the energy consumption by exploiting the available slack time without considering the PE power profiles, a new and fast heuristic for the voltage scaling problem is proposed, which improves the voltage selection for each task dependent on the individual power dissipation caused by that task. Experimental results show that energy reductions with up to 80.7% are achieved by integrating the proposed DVS algorithm, which considers the PE power profiles, into the co-synthesis of distributed systems.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
 |
1
|
|
 |
2
|
C. Brandolese , W. Fornaciari , F. Salice , D. Sciuto, Energy estimation for 32-bit microprocessors, Proceedings of the eighth international workshop on Hardware/software codesign, p.24-28, May 2000, San Diego, California, United States
[doi> 10.1145/334012.334017]
|
| |
3
|
T. D. Burd, T. A. Pering, A. J. Stratakos, and R. W. Brodersen. A Dynamic Voltage Scaled Microprocessor System. IEEE Journal of Solid-State Circuits, 35(11):1571-1580, November 2000.
|
| |
4
|
P. Chretienne, E. G. Coffman, J. K. Lenstra, and Z. Liu. Scheduling Theory and its Applications. John Wiley & Sons, 1995.
|
 |
5
|
|
| |
6
|
Robert P. Dick , David L. Rhodes , Wayne Wolf, TGFF: task graphs for free, Proceedings of the 6th international workshop on Hardware/software codesign, p.97-101, March 15-18, 1998, Seattle, Washington, United States
|
| |
7
|
R. P. Dick and N. K. Jha. MOGAC: A Multiobjective Genetic Algorithm for Hardware-Software Co-Synthesis of Distributed Embedded Systems. IEEE Trans. on CAD, 17(10):920-935, Oct 1998.
|
 |
8
|
|
 |
9
|
|
| |
10
|
|
| |
11
|
I. Hong, D. Kirovski, G. Qu,M.Potkonjak, and M. B. Srivastava. Power Optimization of Variable-Voltage Core-Based Systems. IEEE Trans. on Computer-Aided Design, 18(12):1702-1714, Dec 1999.
|
| |
12
|
|
 |
13
|
|
| |
14
|
A. Klaiber. The Technology behind Crusoe Processors, January 2000. http://www.transmeta.com.
|
| |
15
|
Yau-Tsun Steven Li , Sharad Malik , Andrew Wolfe, Performance estimation of embedded software with instruction cache modeling, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.380-387, November 05-09, 1995, San Jose, California, United States
|
| |
16
|
|
| |
17
|
A. Manzak and C. Chakrabarti. Variable Voltage Task Scheduling for Minimizing Energy or Minimizing Power. In Proc. Internation Conference onAcoustics, Speech, and Signal Processing, pages 3239-3242, 2000.
|
| |
18
|
|
| |
19
|
M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for reduced CPU energy. In Proc. USENIX Symposium on Operating Systems Design and Implementation (OSDI), pages 13-23, 1994.
|
| |
20
|
W. H. Wolf. Hardware/Software Co-Design of Embedded Systems. In Proceedings of the IEEE, pages 967-989, July 1994.
|
| |
21
|
|
CITED BY 16
|
|
|
|
|
|
|
|
|
|
|
|
Bita Gorji-Ara , Pai Chou , Nader Bagherzadeh , Mehrdad Reshadi , David Jensen, Fast and efficient voltage scheduling by evolutionary slack distribution, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.659-662, January 27-30, 2004, Yokohama, Japan
|
|
|
|
|
|
|
|
|
|
|
|
Alexandru Andrei , Marcus T. Schmitz , Petru Eles , Zebo Peng , Bashir M. Al Hashimi, Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints, Proceedings of the conference on Design, Automation and Test in Europe, p.514-519, March 07-11, 2005
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Peer to Peer - Readers of this Article have also read:
-
Data structures for quadtree approximation and compression
Communications of the ACM
28, 9
Hanan Samet
-
A hierarchical single-key-lock access control using the Chinese remainder theorem
Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing
Kim S. Lee
, Huizhu Lu
, D. D. Fisher
-
The GemStone object database management system
Communications of the ACM
34, 10
Paul Butterworth
, Allen Otis
, Jacob Stein
-
Putting innovation to work: adoption strategies for multimedia communication systems
Communications of the ACM
34, 12
Ellen Francik
, Susan Ehrlich Rudman
, Donna Cooper
, Stephen Levine
-
An intelligent component database for behavioral synthesis
Proceedings of the 27th ACM/IEEE conference on Design automation
Gwo-Dong Chen
, Daniel D. Gajski
|