skip to main content
10.1145/502217.502226acmconferencesArticle/Chapter ViewAbstractPublication PagesesweekConference Proceedingsconference-collections
Article

A new method for compiling schizophrenic synchronous programs

Published:16 November 2001Publication History

ABSTRACT

Synchronous programming languages have proved to be advantageous for designing software and hardware for embedded systems. Despite their clear semantics, their compilation is remarkably difficult: In particular, one has to take care of potential schizophrenia problems. Although these problems are correctly translated with existing compilers, there is still a need for clean algorithms. In this paper, we present the first solution to eliminate schizophrenia problems by program transformations. These transformations are used for compilation, but also for increasing the readability of programs.

References

  1. 1.G. Berry. The foundations of Esterel. In G. Plotkin, C. Stirling, and M. Tofte, Proof, Language and Interaction: Essays in Honour of Robin Milner. MIT Press, 1998. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2.G. Berry. The constructive semantics of pure Esterel, July 1999.Google ScholarGoogle Scholar
  3. 3.G. Berry. The Esterel v5_91 language primer. http://www.esterel.org, June 2000.Google ScholarGoogle Scholar
  4. 4.F. Boussinot. SugarCubes implementation of causality. Research Report 3487, INRIA, Sophia Antipolis Cedex, France, September 1998.Google ScholarGoogle Scholar
  5. 5.J. Brzozowski and C.-J. Seger. Asynchronous Circuits. Springer Verlag, 1995.Google ScholarGoogle Scholar
  6. 6.Cadence Design Systems,Inc. Website, 2000. http://www.cadence.com.Google ScholarGoogle Scholar
  7. 7.Esterel Web. Website, 2000. http://www.esterel.org.Google ScholarGoogle Scholar
  8. 8.A. Girault and G. Berry. Circuit generation and verification of Esterel programs. Research report 3582, INRIA, December 1998.Google ScholarGoogle Scholar
  9. 9.M. Gordon and T. Melham. Introduction to HOL: A Theorem Proving Environment for Higher Order Logic. Cambridge University Press, 1993. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. 10.N. Halbwachs and F. Maraninchi. On the symbolic analysis of combinational loops in circuits and synchronous programs. In Euromicro Conference, Como, Italy, September 1995.Google ScholarGoogle Scholar
  11. 11.Jester Home Page. Website, 2000. http://www.parades.rm.cnr.it/projects/jester/jester.html.Google ScholarGoogle Scholar
  12. 12.L. Lavagno and E. Sentovich. ECL: A specification environment for system-level design. In ACM/IEEE Design Automation Conference (DAC), 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. 13.S. Malik. Analysis of cycle combinational circuits. IEEE Transactions on Computer Aided Design, 13(7):950-956, July 1994.Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. 14.POLIS Homepage, 2000. http://www-cad.eecs.berkeley.edu/Google ScholarGoogle Scholar
  15. 15.K. Schneider. A verified hardware synthesis for Esterel. In F. Rammig, editor, International IFIP Workshop on Distributed and Parallel Embedded Systems, pages 205-214. Kluwer Academic Publishers, 2000. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. 16.K. Schneider. Embedding imperative synchronous languages in interactive theorem provers. In International Conference on Application of Concurrency to System Design (ICACSD 2001). IEEE Computer Society Press, June 2001. http://goethe.ira.uka.de/fmg/ps/Schn01a.ps.gz. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. 17.T. Shiple, G. Berry, and H. Touati. Constructive analysis of cyclic circuits. In European Design and Test Conference (EDTC), Paris, France, 1996. IEEE Computer Society Press. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. A new method for compiling schizophrenic synchronous programs

          Recommendations

          Comments

          Login options

          Check if you have access through your login credentials or your institution to get full access on this article.

          Sign in
          • Published in

            cover image ACM Conferences
            CASES '01: Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
            November 2001
            258 pages
            ISBN:1581133995
            DOI:10.1145/502217

            Copyright © 2001 ACM

            Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

            Publisher

            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 16 November 2001

            Permissions

            Request permissions about this article.

            Request Permissions

            Check for updates

            Qualifiers

            • Article

            Acceptance Rates

            Overall Acceptance Rate52of230submissions,23%

            Upcoming Conference

            ESWEEK '24
            Twentieth Embedded Systems Week
            September 29 - October 4, 2024
            Raleigh , NC , USA

          PDF Format

          View or Download as a PDF file.

          PDF

          eReader

          View online with eReader.

          eReader