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Dynamic memory management for programmable devices
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Source ACM SIGPLAN Notices archive
Volume 38 ,  Issue 2 supplement  (February 2003) table of contents
MSP 2002 and ISMM 2002
SESSION: Diverse Topics table of contents
Pages: 139 - 149  
Year of Publication: 2003
ISSN:0362-1340
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Authors
Sanjeev Kumar  Princeton University, Princeton, NJ
Kai Li  Princeton University, Princeton, NJ
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 10,   Downloads (12 Months): 45,   Citation Count: 2
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ABSTRACT

The paper presents the design and implementation of a novel dynamic memory-management scheme for ESP---a language for programmable devices. The firmware for programmable devices has to be fast and reliable. To support high performance, ESP provides an explicit memory-management interface that can be implemented efficiently. To ensure reliability, ESP uses a model checker to verify memory safety.The VMMC firmware is used as a case study to evaluate the effectiveness of this memory-management scheme. We find that the Spin model checker is able to exhaustively verify memory safety of the firmware; the largest process took 67.6 seconds and used 34.45 Mbytes of memory to verify. We also find that the runtime overhead to maintain the reference counts is small; the additional overhead accounts for 7.35% of the total message processing cost (in the worst case) over a malloc/free interface.


REFERENCES

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M. by Ben Zorn. Debugging Tools for Dynamic Storage Allocation and Memory Management. http://www.cs.colorado.edu/homes/zorn/public_html/breakMallocDebug.html, 2001
 
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S. Kumar. ESP: A Language for Programmable Devices. Technical report, Princeton University, Department of Computer Science Department, January 2002
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