J. Eldridge
ABSTRACT
In a computer design project where software and hardware development proceed in parallel, it is essential that some form of simulation is available early so that the software can be breadboarded before the hardware is stable. The simulator must be readily modifiable to accommodate evolving hardware design. For a project at AT&T Bell Laboratories involving several processors of different designs, a program was constructed that generates a simulator from a description of the hardware block diagram. This paper describes the design of that program.
- 1.C. G. Bell and A. Newell, Computer Structures: Readings and Examples. New York, New York: McGraw-Hill, 1971. Google Scholar
Digital Library
- 2.M. R. Barbacci, "Instruction Set Processor Specifications (ISPS): The notation and its applications," IEEE Trans. Comp., Vol. C-30, No. 1, pp. 29-40, January 1981.Google Scholar
- 3.M. R. Barbacci, The Design and Analysis of Instruction Set Processors. New York, New York: McGraw-Hill, 1982. Google ScholarDigital Library
- 4.C. W. Rose, G. M. Ordy, and P. J. Drongowski, "N.mPc: A Study in University-Industry Technology Transfer," IEEE Design and Test of Computers, Vol. 1, No. 1, pp. 44-56, February 1984.Google ScholarDigital Library
- 5.T. Uehara and M. Barbacci (ed.), Computer Hardware Description Languages and their Applications. Amsterdam: North-Holland, 1983. Google ScholarDigital Library
- 6.M. Persson, "Design of Software Tools for Microprogrammable Microprocessor," Microprocessors and their Applications: Fifth EUROMICRO Symposium on Microprocessing and Microprogramming, pp. 119-127, August 1979.Google Scholar
- 7.J. L. Kelly, Jr., C. Lochbaum, and V. A. Vyssotsky, "A Block Diagram Compiler," Bell Syst. Tech. J., Vol. 40, No. 3, pp. 669-676, May 1961.Google ScholarCross Ref
- 8.Alfred V. Aho, John E. Hopcroft, and Jeffrey D. Ullman, Data Structures and Algorithms. Reading, Massachusetts: Addison-Wesley, 1983. Google ScholarDigital Library
- 9.VAK-11 Symbolic Debugger Reference Manual. Maynard, Massachusetts: Digital Equipment Corporation, 1981.Google Scholar
- 10.Bipolar Microprocessor Logic and Interface Data Book. Sunnyvale, California: Advanced Micro Devices, 1981.Google Scholar
- 11.R. L. Whitelaw, private communication.Google Scholar
Index Terms
- A “metasimulator” for microcoded processors
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