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Reducing code size with echo instructions

Published: 30 October 2003 Publication History

Abstract

In an embedded system, the cost of storing a program on-chip can be as high as the cost of a microprocessor. Compressing an application's code to reduce the amount of memory required is an attractive way to decrease costs. In this paper, we examine an executable form of program compression using echo instructions.With echo instructions, two or more similar, but not necessarily identical, sections of code can be reduced to a single copy of the repeating code. The single copy is left in the location of one of the original sections of the code. All the other sections are replaced with a single echo instruction that tells the processor to execute a subset of the instructions from the single copy.We present results of using echo instructions from a full compiler and simulator implementation that takes input programs, compresses them with echo instructions, and simulates their execution. We apply register renaming and instruction scheduling to expose more similarities in code, use profiles to guide compression, and propose minor architectural modifications to support echo instructions. In addition, we compare and combine echo instructions with two prior compression techniques: procedural abstraction and IBM's CodePac.

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  • (2017)PSO-DSThe Journal of Supercomputing10.1007/s11227-017-1992-z73:9(3924-3947)Online publication date: 1-Sep-2017
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cover image ACM Conferences
CASES '03: Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
October 2003
340 pages
ISBN:1581136765
DOI:10.1145/951710
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 30 October 2003

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Author Tags

  1. code size optimization
  2. compression
  3. echo instructions

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CASES '03 Paper Acceptance Rate 31 of 162 submissions, 19%;
Overall Acceptance Rate 52 of 230 submissions, 23%

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Cited By

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  • (2023)Linker Code Size Optimization for Native Mobile ApplicationsProceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction10.1145/3578360.3580256(168-179)Online publication date: 17-Feb-2023
  • (2021)An Experience with Code-Size Optimization for Production iOS Mobile Applications2021 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)10.1109/CGO51591.2021.9370306(363-377)Online publication date: 27-Feb-2021
  • (2017)PSO-DSThe Journal of Supercomputing10.1007/s11227-017-1992-z73:9(3924-3947)Online publication date: 1-Sep-2017
  • (2012)Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW CompressionProceedings of the 2012 IEEE 14th International Conference on High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems10.1109/HPCC.2012.14(25-32)Online publication date: 25-Jun-2012
  • (2011)Design and Implementation of Echo Instructions for an Embedded ProcessorIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.4.2224(222-231)Online publication date: 2011
  • (2011)Visualization of Computational Processes of Procedural Abstraction Optimization PassesProceedings of the 2011IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications10.1109/TrustCom.2011.150(1099-1108)Online publication date: 16-Nov-2011
  • (2011)A performance and energy exploration of dictionary code compression architecturesProceedings of the 2011 International Green Computing Conference and Workshops10.1109/IGCC.2011.6008584(1-8)Online publication date: 25-Jul-2011
  • (2010)Profile-driven selective program loadingProceedings of the 16th international Euro-Par conference on Parallel processing: Part I10.5555/1887695.1887703(62-73)Online publication date: 31-Aug-2010
  • (2010)Improved Dictionary-Based Code-Compression Schemes with XOR Reference for RISC/VLIW ArchitectureIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E93.A.2517E93-A:12(2517-2523)Online publication date: 2010
  • (2010)Squashing code size in microcoded IPs while delivering high decompression speedDesign Automation for Embedded Systems10.1007/s10617-010-9057-z14:3(265-284)Online publication date: 1-Sep-2010
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