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- Guthaus MWilke GReis R(2013)Revisiting automated physical synthesis of high-performance clock networksACM Transactions on Design Automation of Electronic Systems10.1145/2442087.244210218:2(1-27)Online publication date: 11-Apr-2013
- Chen SLiu X(2007)A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM DesignsProceedings of the First International Symposium on Networks-on-Chip10.1109/NOCS.2007.4(75-82)Online publication date: 7-May-2007
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