Seokkee Kim
ABSTRACT
We describe the design of an nRERL microprocessor for ultra-low-energy applications. nRERL (nMOS Reversible Energy Recovery Logic) is a new reversible adiabatic logic circuit using only nMOS transistors, which can be operated at the leakage-current level [1]. We focus on two main issues; first, the design of a full adiabatic microprocessor, which uses only adiabatic components for all the functional blocks, second, the energy consumption of the nRERL microprocessor including its clocked power generator (CPG). With the experimental results, the nRERL microprocessor consumed 26.22 pJ at 440 kHz.
- 1.J. Lim, D. -G. Kim, and S. -I. Chae, "nMOS reversible energy recovery logic for ultra-low-energy applications," IEEE JSSC, pp. 865-875, Jun. 2000.Google Scholar
- 2.C. J. Vieri, "Pendulu: a reversible computer architecture," M.S. thesis, Massachusetts Institute of Technology, June1995.Google Scholar
- 3.W. C. Athas, N. Tzartzanis, L. "J." Svensson, L. Peterson, H. Li, X. Jiang, and W. -C. Liu, "AC-1: a clocked-powered microprocessor," in Proc. of ISLPED, Aug. 1997, pp. 328-333. Google ScholarDigital Library
- 4.J. -H. Kwon, J. Lim, and S. -I. Chae, "A Three-Port nRERL Register Rile for Ultra-Low-Energy Applications," in Proc. of ISLPED, Jul. 2000. Google ScholarDigital Library
- 5.J. Lim, D. -G. Kim, and S. -I. Chae, "Reversible energy recovery logic circuit and its 8-phase clocked power generator for ultra-low-power applications," IEICE Trans. on Electronics, vol. E82-C, no. 4, pp. 646-653, April 1999.Google Scholar
Index Terms
- An 8-b nRERL microprocessor for ultra-low-energy applications
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