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Evaluation of processor code efficiency for embedded systems

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Published:17 June 2001Publication History

ABSTRACT

This paper evaluates the code efficiency of the ARM, Java, and x86 instruction sets by compiling the SPEC CPU95/ CPU2000/JVM98 and CaffeineMark benchmarks, in terms of code sizes, basic block sizes, instruction distributions, and average instruction lengths.

As a result, mainly because (i) the Java architecture is a stack machine, (ii) there are only four local variables which can be accessed by a 1-byte instruction, and (iii) additional instructions are provided for the network security, the code efficiency of Java turns out to be inferior to that of ARM Thumb. Moreover, through this efficiency analysis it should be claimed that a more efficient code architecture can be constructed by taking minute account of the customization of an instruction set as well as the number of registers.

References

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      • Published in

        cover image ACM Conferences
        ICS '01: Proceedings of the 15th international conference on Supercomputing
        June 2001
        510 pages
        ISBN:158113410X
        DOI:10.1145/377792

        Copyright © 2001 ACM

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 17 June 2001

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        ICS '01 Paper Acceptance Rate45of133submissions,34%Overall Acceptance Rate584of2,055submissions,28%

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